Siegfried Hart

is looking for freelance projects. 🔎

Inhaber, Hi-tech Product Development Consulting / Project & Program Management Consulting, Vasona Consult

Munich, Deutschland

Fähigkeiten und Kenntnisse

High Tech Product Development
Project Management Consulting
Product Development
Program Management
Project management
Project management office (PMO)
Management Consulting

Werdegang

Berufserfahrung von Siegfried Hart

  • Bis heute 17 Jahre und 6 Monate, seit Jan. 2007

    Hi-tech Product Development Consulting / Project & Program Management Consulting

    Vasona Consult

    Work hands-on with hi-tech clients, enabling them to systematically scope, plan and execute accelerated projects that deliver the right products at the right time. Vasona is a Silicon-Valley based consulting firm with focus on accelerating hi-tech product development, portfolio management and project execution (www.vasona.us).

  • 2014 - 2016

    Sr. Director, Head of Program Management - Power Conversion Products

    Avogy

    Drove development of Avogy’s next generation power products including HW, SW & IC design, w/ focus on improving how new product development projects are scoped, structured, planned & executed. • Developed world's smallest 70W multi-port laptop charger ("Zolt") • Led development of Avogy's GaN power-transistor process technology • Drove San Jose fab-expansion from kick-off to device processing in <7 months

  • 2012 - 2014

    Director, Head of Corporate PMO - Programmable Logic Products

    Altera

    Headed up Altera's global PMO, drove development of Altera’s complex next generation programmable products, covering R&D budget of >$350 Million/year.

  • 2011 - 2012

    Director, Program Management Office - Semiconductor Technology Development

    SVTC Technologies

    Responsible for significantly upgrading planning and execution of a portfolio of 25+ leading-edge process technology projects, as well as leading in-house infrastructure projects such as SVTC’s Solar fab construction and start up. SVTC was a divisional spin-off from Cypress Semiconductor.

  • 2010 - 2011

    Sr. Manager, Business Process Management

    GLOBALFOUNDRIES

    As part of GF’s Corporate BPM Group, planned and executed business process improvement initiatives while migrating solid project management practices into technology development and infrastructure teams.

  • 2005 - 2006

    Sr. Engr. Program Manager - SoC Solutions for DSL

    Centillium Communications

    Responsible for definition, design and introduction of new DSL products consisting of multiple integrated devices & SoC, firmware/software and board-level HW, with R&D budget >$6 Million/year. Coordinated cross-functional teams of >80 engineers and several development partners across US, Europe and Asia.

  • 2002 - 2005

    Engr. Program Manager - Chips for WLAN & GPS

    RFMD (now Qorvo)

    Responsible for driving cross-functional teams in US and Europe to develop GPS and wireless LAN chip sets, firmware and software for integration into consumer products and cellular handsets.

  • 2001 - 2002

    Sr. Member of Technical Staff - Wireless LAN Devices

    Resonext Communications

    Responsible for the development of a family of 802.11 transceiver and base-band chip sets which set the foundation for subsequent RF Micro Devices wireless LAN products. Resonext Communications was acquired by RF Micro Devices in 2002.

  • 1997 - 2001

    Sr. Design Engineer / Technical Project Manager - Computer Storage & Wireline

    Infineon Technologies

    Responsible for design and technical project management of integrated circuits for wire-line communication and computer storage solutions. Introduced Infineon’s first E3/T3 device after <12 months development, which created the foundation for a family of successful SoC products. Joined Santa Cruz development team to design Infineon’s first R/W-Channel SoC devices, which set the groundwork for Infineon’s hard disk business, which was successfully sold to LSI in 2008.

  • 1995 - 1996

    Design Engineer - Low Noise Sensing Devices

    Brookhaven National Laboratory

    Developed ultra-low-noise integrated circuits for the “Relativistic Heavy Ion Collider" particle accelerator located at Brookhaven National Laboratory, New York.

Ausbildung von Siegfried Hart

  • 1995 - 1997

    Electrical Engineering

    Wayne State University

    Thesis: “Design of a CMOS multi-channel charge-sensitive preamplifier/shaper chip for silicon drift detectors”, Brookhaven National Laboratory, Upton, NY

  • 1990 - 1995

    Electrical Engineering

    Munich University of Applied Science

    Thesis: “Development of CMOS-integrated, current-controlled oscillators for use in automotive micro-controllers”, ST Microelectronics, Grafing, Germany

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Muttersprache

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