Matthias Grumer

Angestellt, Principal Engineer / Digital Cluster Lead, NXP Semiconductors Austria GmbH

Gratkorn, Österreich

Werdegang

Berufserfahrung von Matthias Grumer

  • Bis heute 8 Jahre und 9 Monate, seit Okt. 2015

    Principal Engineer / Digital Cluster Lead

    NXP Semiconductors Austria GmbH

    The cluster leader is responsible to overall coordinate activities within the sub development group (development cluster) and supports the project manager. He leads and coordinates the sub team in respect to the overall project targets and directs the development activities. He is responsible for the development results of his implementation / verification group as well as supporting planning and team setup.

  • Bis heute 10 Jahre und 10 Monate, seit Sep. 2013

    Digital Cluster Lead

    NXP Semiconductors Austria GmbH

    The cluster leader is responsible to overall coordinate activities within the sub development group (development cluster) and supports the project manager. He leads and coordinates the sub team in respect to the overall project targets and directs the development activities. He is responsible for the development results of his implementation / verification group as well as supporting planning and team setup.

  • 1 Jahr, Okt. 2012 - Sep. 2013

    Senior Digital Hardware Engineer

    NXP Semiconductors Austria GmbH

  • 2 Jahre und 7 Monate, März 2010 - Sep. 2012

    Digital Hardware Engineer

    NXP Semiconductors Austria GmbH

    Instruction set enhancements of MRKIII-CPU. Design of memory management unit.

  • 1 Jahr und 10 Monate, Mai 2008 - Feb. 2010

    Software Engineer

    NXP Semiconductors

  • 2 Jahre und 6 Monate, Nov. 2005 - Apr. 2008

    Research

    Graz University of Technology

  • 4 Monate, Aug. 2005 - Nov. 2005

    Technical Assistent

    Universidad Tecnologica de Panama

Ausbildung von Matthias Grumer

  • 3 Jahre, Nov. 2005 - Okt. 2008

    Electrical Engineering

    Graz University of Technology

  • 6 Monate, Jan. 2004 - Juni 2004

    Telecommunication

    Universidad Politécnica de Madrid

  • 5 Jahre und 10 Monate, Okt. 1999 - Juli 2005

    Telematics

    Graz University of Technology

    System On Chip Design IT-Security

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Muttersprache

  • Italienisch

    Fließend

  • Spanisch

    Fließend

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