Mario Di Ronza
Bis 2019, Project Lead, Intel Deutschland GmbH
Munich, Deutschland
Werdegang
Berufserfahrung von Mario Di Ronza
Bis heute 4 Jahre und 7 Monate, seit Dez. 2019
IP Logic Design Engineer
Apple Mobile B.V. & Co. KG
Bis heute 14 Jahre, seit Juli 2010
Freelance
Self-employed
Engineering services in fields of digital IC and circuit development, semiconductor memory testing, project- and product management, product qualification, software programming, application development for embedded systems, computer and building automation networks.
Digital design and verification lead.
8 Jahre und 10 Monate, Feb. 2011 - Nov. 2019
Digital Design Engineer
Intel Mobile Communications GmbH
8 Monate, Okt. 2009 - Mai 2010
Sales assistant
Qeron Technology GmbH & Co. KG, Starnberg, Germany
2 Jahre und 10 Monate, März 2006 - Dez. 2008
Senior Manager Roadmap Management.
QIMONDA AG, Gustav-Heinemann-Ring 212, D-81739 Munich, Germany
DRAM competitive analysis. Support to strategy and business development. Product roadmap management and publishing company wide. Development and maintenance of roadmap management tools.
5 Jahre und 10 Monate, Mai 2000 - Feb. 2006
Staff Engineer SRAM/ROM development.
INFINEON TECHNOLOGIES AG, Balanstr.73, D-81541 Munich, Germany
Design of user-configurable fault-tolerant architectures for embedded 6T SRAM (6-Transistor Static Random Access Memory) arrays. Development of driving logic for OTP (One-Time Programmable) metal and poly fuses. Digital macrocell modeling (VHDL/Verilog). Development of HDL code generators (VHDL/Verilog). Expert support for large-volume designs. Technical documentation.
1 Jahr und 9 Monate, Sep. 1998 - Mai 2000
ASIC development engineer.
IPM Group, PO.BOX 152, I-80022 Arzano NA, Italy
FPGA and ASIC development engineer.
7 Jahre und 2 Monate, Juli 1991 - Aug. 1998
Digital/analog circuit design engineer – Wireline communication.
IPM Group, PO.BOX 152, I-80022 Arzano NA, Italy
Design of systems and terminals for public telephony. Digital and analog circuit design, including thick-film analog circuits. Product qualification at the accredited laboratories, including physical layer and EMC (Electro-Magnetic Compatibility) tests. Design specification and project management.
Ausbildung von Mario Di Ronza
8 Jahre und 10 Monate, Okt. 1982 - Juli 1991
Electronic Engineering
Universita´ degli Studi Federico II, Naples, Italy
Biomedics
Sprachen
Deutsch
Gut
Englisch
Fließend
Italienisch
Muttersprache
Französisch
Grundlagen