Ing. Himadri Bhattacharyya

Design of a Low Power Area Efficient 8 Bit SAR ADC in 22nm technology for DNN Neuromorphic Computing Works Includes : 1. Literature Review to choose proper topologies for the ADC. 2. Behavioral modelling of the different functional blocks of the ADC. 3. Schematic Design of a Capacitive DAC and its Performance Analysis. 4. Schematic Design of Dynamic Comparator and its Performance Analysis. 5. Calibration of Offset and KickBack Noise of the Comparator. 6. SAR Controller Design (If Time permits)

1. MOSFET Characterization and analysis of results in different technologies like GF 22nm , XFAB 130nm , TSMC 90nm etc.

1. An OP-AMP Design in 180nm technology. 2. A 2-Stage OP-AMP Design in GF-22nm Technology. 3. Literature Review to understand the problem statement of the master thesis.

I worked for different clients in Accenture Services Pvt Ltd . At entry level I worked as a tester where the technologies I have used is to write SQL queries and match production data with testing data and generate report. For my second client I worked as PLSQL developer worked in Oracle 11g database where my major work were to write stored procedures, functions and triggers. I have worked in Python for data mining also. ALso I have worked in javascript development (Open for React js)

Sensors , Nanoelectronics , Electronics Technology , Nanotechnology , Spectroscopic Methods , Embedded Systems , Assembly process , Advance Packaging , Semiconductor Physics 1 and 2 , MEMS , Ghz and Thz components , Microtechnologies ,

Analog Electronics , Digital electronics , VHDL , Matlab , Semiconductor Physics , Engineering Maths 1 and 2 , Sensors, Microcontroller and Microprocessor , Signal and systems , Antenna , Fiber Optics , Mobile communication , COntrol Engineering 1 and 2 , Computer Networks , C programming