Anil Kumar Janumpally

Angestellt, Senior Hardware (CHIP) Architect, CoinBau GmbH

Dresden, Deutschland

Fähigkeiten und Kenntnisse

ASIC / FPGA Digital Design & Verification
Functional Safety (ISO 26262)
Automotive System Engineering

Werdegang

Berufserfahrung von Anil Kumar Janumpally

  • Bis heute 6 Jahre, seit Juli 2018

    Senior Hardware (CHIP) Architect

    CoinBau GmbH

  • 1 Jahr und 2 Monate, Mai 2017 - Juni 2018

    Senior MTS (Member of Technical Staff)

    Maxim Integrated

    Support companywide Functional Safety & Risk Analysis • Maintain Functional Safety procedures compliant to latest ISO26262 standard • Maintain FMEA procedures compliant to AIAG standard • Provide guidance to achieving compliance up to ASIL D • Responsible for conducting FMEA, FMEDA, FTA, Impact Analysis, etc • Performing Functional Safety Assessment of Automotive products for ISO26262 Compliance • Develop & Provide Functional Safety Trainings via e-Learning/On-Site/Online

  • 4 Jahre und 8 Monate, Sep. 2012 - Apr. 2017

    Senior Engineer

    Renesas Electronics Europe GmbH

    Product Development of SoC Products & Derivatives using ARM Platform for Automobile applications Designing of SoC Products & Derivatives using ARM / RH850 (v850) Platform for Automobile & Industrial applications

  • 1 Jahr und 3 Monate, Juni 2011 - Aug. 2012

    Engineer

    ZMDI

    Designing of SoC Products & Derivatives for Smart Power Management applications

  • 2 Jahre und 11 Monate, Juli 2008 - Mai 2011

    Engineer

    Renesas Electronics Europe GmbH

    Designing SoC Products & Derivatives using RH850 (v850) Platform for Automobile Applications

  • 8 Monate, Nov. 2007 - Juni 2008

    Engineer

    SafeNet Technologies B.V.

    Designing of DMA Controller IP for Secure Products

  • 1 Jahr und 9 Monate, Jan. 2006 - Sep. 2007

    Junior Design Engineer

    TES Electronic Solutions

    Designing of Graphic Chip (As an onsite contractor for Renesas Electronics (Europe) GmbH) Designing of Live-Streaming MPEG4 Demonstrator (As an external contractor for ABS GmbH) Conversion of DTP IP Core from VHDL to Verilog

Ausbildung von Anil Kumar Janumpally

  • 3 Jahre und 3 Monate, Okt. 2002 - Dez. 2005

    Microelectronics and Microsystems

    TU Hamburg-Harburg

  • 3 Jahre und 10 Monate, Sep. 1997 - Juni 2001

    Electronics and Communication Engineering

    JNTU Hyderabad

Sprachen

  • Englisch

    Fließend

  • Deutsch

    Gut

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